WCET 2024 – Program

22nd International Workshop on
Worst-Case Execution Time Analysis

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The proceedings are available at: https://www.dagstuhl.de/dagpub/978-3-95977-346-1

Keynote by Pr. Isabelle Puaut (Univ. Rennes):

Machine Learning for Timing Analysis: the good, the bad and the ugly

The microarchitecture of processors is becoming increasingly complex and less documented, making the design of timing models for WCET calculation increasingly complicated, if not impossible. We have recently experimented with the use of machine learning techniques (ML) to predict the WCET of basic blocks. Predicted WCETs can then be integrated into static WCET calculation tools, resulting in a hybrid WCET calculation. In this keynote, I will present our experience using ML for WCET calculation, across a range of architectures, from very simple ones (MSP430, Cortex M4) to more complex architectures. Rather than presenting only what worked, which fortunately allowed us to publish, I will also discuss in this keynote the bad, and even very bad, surprises encountered during the process, and how we overcame (most of) them.

Program:

13:30: Keynote by Pr. Isabelle Puaut: Machine Learning for Timing Analysis: the good, the bad and the ugly

14:15 – 15:05: Session 1: Regular papers

The Platin Multi-Target Worst-Case Analysis Tool. Emad Jacob Maroun, Eva Dengler, Christian Dietrich, Stefan Hepp, Henriette Herzog, Benedikt Huber, Jens Knoop, Daniel Wiltsche-Prokesch, Peter Puschner, Phillip Raffeck, Martin Schoeberl, Simon Schuster, Peter Wägemann

WORTEX: Worst-Case Execution Time and Energy Estimation in Low-Power Microprocessors Using Explainable ML. Hugo Reymond, Abderaouf Nassim Amalou, Isabelle Puaut

15:05 – 15:30: Break

15:30 – 17:10: Session 2: Invited papers

Assessing Unchecked Factors for Certification: An Experimental approach for GPU Cache Parameters. Cédric Cazanove, Benjamin Lesage, Frédéric Boniol, Jérôme Ermont

Worst-Case Execution Time Analysis of Lingua Franca Applications. Martin Schoeberl, Ehsan Khodadad, Shaokai Lin, Emad Jacob Maroun, Luca Pezzarossa, Edward A. Lee

On the Granularity of Bandwidth Regulation in FPGA-based Heterogeneous Systems on Chip. Gianluca Brilli, Giacomo Valente, Alessandro Capotondi, Tania Di Mascio, Andrea Marongiu

Statistical, Stochastic or Probabilistic (Worst-Case Execution) Execution Time? – What Impact on the Multicore Composability. Liliana Cucu-Grosjean

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